Design Integration (296742)

San Jose, CA 95134

Posted: 10/28/2020 Industry: Engineering Job Number: 4171

Job Description


As a Design Integration Engineer, you will work as part of a GPU IP design team. This is a mid to senior level position where the candidate will be in an individual contributor role, tasked with driving the Integration efforts across various sub-blocks.

Key Responsibilities include:

• Engage in Lint, CDC and Spyglass Clean up with RTL Team
• Automate day-to-day data gathering efforts

Minimum Requirements:

• BSEE, Computer Engineer or comparable and 5 + years of experience with Verilog and System Verilog
• 3 years of experience with Spyglass tools (Lint, CDC) and Spyglass DFT
• Experience with Design Compiler synthesis
• Experience with scripting languages (Perl/Tcl/Python)
• Experience in Python Pandas Data frames

Preferred candidate will possess the following:

• Good written and verbal communication skills
• Experience in Lint, CDC and Spyglass
• Scripting proficiency

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